1. Field of the Invention
This invention relates to a circuit device which includes a direct-current characteristic test circuit.
2. Description of the Related Art
The direct-current characteristic test (hereinafter referred to as DC test) of LSIs (large scale integrated circuits) has heretofore been conducted by test methods called a V.sub.OL test and a V.sub.OH test. In conducting the DC test, voltage variation's are measured by allowing a load current to flow under a condition that a high level signal (in the case of the V.sub.OH test) or a low level signal (in the case of the V.sub.OL test) is caused to be output from an arbitrary output pin. In cases where there is no special DC test circuit within the LSI, therefore, it is necessary to apply clock signals 1, 2 . . . , n to a plurality of input pins 2a, 2b, . . . , 2n disposed on the device 1 under the DC test (hereinafter referred to as the DUT) for the purpose of making the level of a signal output from an output pin 3 high or low, as shown in FIG. 1 of the accompanying drawings. In such a case, the DC test has been troublesome. Further, even in cases where a special circuit is provided within the LSI for DC-testing the DUT 21, as represented by parts 24 to 27 in FIG. 2, it has been necessary to have input pins 22a and 22b arranged to receive a signal TEST-CONTROL for switching the circuit action between a DC test operation and an ordinary operation and a signal TEST-DATA for setting the signal output from an output pin 23 at a high level or at a low level. To meet this requirement, therefore, the number of pins of the LSI must be increased.